1. Field
Exemplary embodiments of the present invention relate to a non-volatile memory device and a method for fabricating the same, and more particularly, to a non-volatile memory device having a three-dimensional (3D) structure where a plurality of memory cells are stacked, and a method for fabricating the same.
2. Description of the Related Art
A non-volatile memory device retains data stored therein even when a power supply is cut off. Here, there are diverse types of non-volatile memory devices such as NAND-type flash memory devices.
In improving the integration degree of a non-volatile memory device, two-dimensional (2D) structures where memory cells are formed in a single layer over a semiconductor substrate have reached physical limits. Thus, a non-volatile memory device having a three-dimensional (3D) structure where a plurality of memory cells are formed along cylindrical channels that are formed vertically from a semiconductor substrate have been developed.
To further increase the integration degree of a non-volatile memory device having a three-dimensional structure, the number of gate electrode layers and inter-layer dielectric layers that are alternately stacked over cell regions of the semiconductor substrate is to increase. Such an increase may cause a step height difference between cell regions and peripheral circuit regions of the semiconductor substrate and lead to difficulties in performing a process for forming contacts in the peripheral circuit regions. For example, in the course of forming contact holes having a high aspect ratio, an occurrence of a not-open contact and attacks against structures underneath the contact holes may be caused.